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About

About

I'm a post-doctoral researcher at the SPeCS lab in the Faculty of Engineering, University of Porto. My area of expertise is source-to-source compilers and code generation, and I have done work both in high-level languages, such as MATLAB and C++, and low-level languages, such as assembly and VHDL.

From 2012 to 2015, my main line of research was MATLAB to C compilation, and I was the creator and main developer of the tool MATISSE (specs.fe.up.pt/tools/matisse). Currently I am working on Clava (specs.fe.up.pt/tools/clava), a C++ source-to-source transformation tool based on Clang, as part of the H2020 project ANTAREX (antarex-project.eu) which focus on strategies for autotunning and energy efficiency in HPC.

Previous work includes translation of Perl-Compatible Regular Expressions (PCRE) to HDL, and automatic runtime migration of loops found in MicroBlaze assembly traces to customized hardware (the subject of the PhD thesis).

I've received a Bachelor's degree in Computer Systems and Informatics from the Univ. of Algarve in July 2006, and in July 2012 received the Ph.D. degree from Instituto Superior Técnico (IST), Lisbon, with the thesis “Mapping Runtime-Detected Loops from Microprocessors to Reconfigurable Processing Units”.

Interest
Topics
Details

Details

  • Name

    João Bispo
  • Role

    Area Manager
  • Since

    01st May 2015
002
Publications

2024

Enhancing Object Detection in Maritime Environments Using Metadata

Authors
Fernandes, DS; Bispo, J; Bento, LC; Figueiredo, M;

Publication
PROGRESS IN PATTERN RECOGNITION, IMAGE ANALYSIS, COMPUTER VISION, AND APPLICATIONS, CIARP 2023, PT II

Abstract
Over the years, many solutions have been suggested in order to improve object detection in maritime environments. However, none of these approaches uses flight information, such as altitude, camera angle, time of the day, and atmospheric conditions, to improve detection accuracy and network robustness, even though this information is often available and captured by the UAV. This work aims to develop a network unaffected by image-capturing conditions, such as altitude and angle. To achieve this, metadata was integrated into the neural network, and an adversarial learning training approach was employed. This was built on top of the YOLOv7, which is a state-of-the-art realtime object detector. To evaluate the effectiveness of this methodology, comprehensive experiments and analyses were conducted. Findings reveal that the improvements achieved by this approach are minimal when trying to create networks that generalize more across these specific domains. The YOLOv7 mosaic augmentation was identified as one potential responsible for this minimal impact because it also enhances the model's ability to become invariant to these image-capturing conditions. Another potential cause is the fact that the domains considered (altitude and angle) are not orthogonal with respect to their impact on captured images. Further experiments should be conducted using datasets that offer more diverse metadata, such as adverse weather and sea conditions, which may be more representative of real maritime surveillance conditions. The source code of this work is publicly available at https://git hub.com/ipleiria-robotics/maritime-metadata-adaptation.

2024

A DSL and MLIR Dialect for Streaming and Vectorisation

Authors
da Silva, MC; Sousa, L; Paulino, N; Bispo, J;

Publication
APPLIED RECONFIGURABLE COMPUTING. ARCHITECTURES, TOOLS, AND APPLICATIONS, ARC 2024

Abstract
This work addresses the contemporary challenges in computing, caused by the stagnation of Moore's Law and Dennard scaling. The shift towards heterogeneous architectures necessitates innovative compilation strategies, prompting initiatives like the Multi-Level Intermediate Representation (MLIR) project, where progressive code lowering can be achieved through the use of dialects. Our work focuses on developing an MLIR dialect capable of representing streaming data accesses to memory, and Single Instruction Multiple Data (SIMD) vector operations. We also propose our own Structured Representation Language (SRL), a Design Specific Language (DSL) to serve as a precursor into the MLIR layer and subsequent inter-operation between new and existing dialects. The SRL exposes the streaming and vector computational concepts to a higher-level, and serves as intermediate step to supporting code generation containing our proposed dialect from arbitrary input code, which we leave as future work. This paper presents the syntaxes of the SRL DSL and of the dialect, and illustrates how we aim to employ them to target both General-Purpose Processors (GPPs) with SIMD co-processors and custom hardware options such as Field-Programmable Gate Arrayss (FPGAs) and Coarse-Grained Re-configurable Arrays (CGRAs).

2024

Using Source-to-Source to Target RISC-V Custom Extensions: UVE Case-Study

Authors
Henriques, M; Bispo, J; Paulino, N;

Publication
PROCEEDINGS OF THE RAPIDO 2024 WORKSHOP, HIPEAC 2024

Abstract
Hardware specialization is seen as a promising venue for improving computing efficiency, with reconfigurable devices as excellent deployment platforms for application-specific architectures. One approach to hardware specialization is via the popular RISC-V, where Instruction Set Architecture (ISA) extensions for domains such as Edge Artifical Intelligence (AI) are already appearing. However, to use the custom instructions while maintaining a high (e.g., C/C++) abstraction level, the assembler and compiler must be modified. Alternatively, inline assembly can be manually introduced by a software developer with expert knowledge of the hardware modifications in the RISC-V core. In this paper, we consider a RISC-V core with a vectorization and streaming engine to support the Unlimited Vector Extension (UVE), and propose an approach to automatically transform annotated C loops into UVE compatible code, via automatic insertion of inline assembly. We rely on a source-to-source transformation tool, Clava, to perform sophisticated code analysis and transformations via scripts. We use pragmas to identify code sections amenable for vectorization and/or streaming, and use Clava to automatically insert inline UVE instructions, avoiding extensive modifications of existing compiler projects. We produce UVE binaries which are functionally correct, when compared to handwritten versions with inline assembly, and achieve equal and sometimes improved number of executed instructions, for a set of six benchmarks from the Polybench suite. These initial results are evidence towards that this kind of translation is feasible, and we consider that it is possible in future work to target more complex transformations or other ISA extensions, accelerating the adoption of hardware/software co-design flows for generic application cases.

2024

A C Subset for Ergonomic Source-to-Source Analyses and Transformations

Authors
Matos, JN; Bispo, J; Sousa, LM;

Publication
PROCEEDINGS OF THE RAPIDO 2024 WORKSHOP, HIPEAC 2024

Abstract
Modern compiled software, written in languages such as C, relies on complex compiler infrastructure. However, developing new transformations and improving existing ones can be challenging for researchers and engineers. Often, transformations must be implemented bymodifying the compiler itself, which may not be feasible, for technical or legal reasons. Source-to-source compilers make it possible to directly analyse and transform the original source, making transformations portable across different compilers, and allowing rapid research and prototyping of code transformations. However, this approach has the drawback of exposing the researcher to the full breadth of the source language, which is often more extensive and complex than the IRs used in traditional compilers. In this work, we propose a solution to tame the complexity of the source language and make source-to-source compilers an ergonomic platform for program analysis and transformation. We define a simpler subset of the C language that can implement the same programs with fewer constructs and implement a set of sourceto-source transformations that automatically normalise the input source code into equivalent programs expressed in the proposed subset. Finally, we implement a function inlining transformation that targets the subset as a case study. We show that for this case study, the assumptions afforded by using a simpler language subset greatly improves the number of cases the transformation can be applied, increasing the average success rate from 37%, before normalisation, to 97%, after normalisation. We also evaluate the performance of several benchmarks after applying a naive inlining algorithm, and obtained a 12% performance improvement in certain applications, after compiling with the flag O2, both in Clang and GCC, suggesting there is room for exploring source-level transformations as a complement to traditional compilers.

2024

15th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 13th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2024, January 18, 2024, Munich, Germany

Authors
Bispo, J; Xydis, S; Curzel, S; Sousa, LM;

Publication
PARMA-DITAM

Abstract

Supervised
thesis

2023

Mutation Operators for Android Apps

Author
Ana Rita Cheio da Veiga

Institution

2023

Mutation Testing Cost Reduction Techniques for Java Applications

Author
David Roberto Cravo da Mata

Institution

2023

CORAL: a Rust-like Borrow Checker for C

Author
Tiago Duarte da Silva

Institution

2023

Mutation Testing Cost Reduction Techniques for Java Applications

Author
David Roberto Cravo da Mata

Institution

2023

A Holistic Approach for Partitioning and Optimizing Software Applications on FPGAs

Author
Tiago Lascasas dos Santos

Institution