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Publications

Publications by CTM

2014

A Time Synchronization Circuit with an Average 4.6 ns One-Hop Skew for Wired Wearable Networks

Authors
Derogarian, F; Ferreira, JC; Grade Tavares, VMG;

Publication
2014 17TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD)

Abstract
This paper describes and evaluates a fully digital circuit for one-way master-to-slave highly precise time synchronization in a low-power, wearable system equipped with a set of sensor nodes connected in a mesh network. Sensors are connected to each other with conductive yarns that are used as one-wire bidirectional communication links. The circuit is designed to perform synchronization in the Medium Access Control (MAC) layer. In each sensor node, the synchronization circuit provides a synchronized, programmable clock signal and a real-time counter for time stamping. Experimental results obtained with an implementation in 0.35 mu m CMOS technology for a network of electromyography sensors show that the circuit keeps the one-hop average clock skew below 4.6 ns, a value small enough to satisfy many wearable application requirements.

2014

Trace-Based Reconfigurable Acceleration with Data Cache and External Memory Support

Authors
Paulino, N; Ferreira, JC; Cardoso, JMP;

Publication
2014 IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL AND DISTRIBUTED PROCESSING WITH APPLICATIONS (ISPA)

Abstract
This paper presents a binary acceleration approach based on extending a General Purpose Processor (GPP) with a Reconfigurable Processing Unit (RPU), both sharing an external data memory. In this approach repeating sequences of GPP instructions are migrated to the RPU. The RPU resources are selected and organized off-line using execution trace information. The RPU core is composed of Functional Units (FUs) that correspond to single CPU instructions. The FUs are arranged in stages of mutually independent operations. The RPU can enable several stages in tandem, depending on the data dependencies. External data memory accesses are handled by a configurable dual-port cache. A prototype implementation of the architecture on a Spartan-6 FPGA was validated with 12 benchmarks and achieved an overall geometric mean speedup of 1.91x.

2014

Design and Implementation of Hybrid Circuit/Packet Switching for Wearable Systems

Authors
Derogarian, F; Ferreira, JC; Grade Tavares, VMG;

Publication
2014 IEEE 23RD INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS (ISIE)

Abstract
This paper presents a network router and transceiver for wearable, low-power, high-speed Body Area Networks (BAN) applications running in a mesh network of sensors embedded in textiles and connected to each other with conductive yarns functioning as bidirectional transmission channels. The routing of data packets from sensor nodes to a sink node is based on hybrid circuit and packet switching. In comparison with pure packet switching, hybrid routing decreases end-to-end delay, power consumption and buffer size. The proposed design uses independent sender, receiver and circuit switching modules, thereby allowing the nodes to simultaneously send and receive data. The simulation results show that circuit and hybrid switching modes significantly increase the performance of the system. In addition, implementing the complete packet process on FPGA, instead of using an external microcontroller as in previous work, enables a much faster routing process. The results are based on a Verilog description of the system, which has been synthesized for a low-power IGLOO FPGA with Libero Project Manager and simulated with ModelSim. The implementation operates successfully at a data rate of 20 Mbps.

2014

Audio-Perceptual Evaluation of Portuguese Voice Disorders-An Inter-and Intrajudge Reliability Study

Authors
Freitas, SV; Pestana, PM; Almeida, V; Ferreira, A;

Publication
JOURNAL OF VOICE

Abstract
Objectives/Hypothesis. The aim of this article was to describe the results of an audio-perceptual evaluation carried out by 10 judges, on a database comprising 90 voice recordings plus 10 samples repetition, with the purpose of characterizing the intra-and interrater reliability. Study Design. Exploratory, transversal. Methods. The classification of the GRBAS parameters was obtained for each one of the 10 experts, concerning the 90 voice samples. The intraclass correlation coefficient determined the interrater reliability. For the 10 repeated voices, the intrarater reliability was assessed by means of a dispersion analysis. Results. The average judges' classification for each of the GRBAS parameters differs (P < 0.05). The values of the correlations, with confidence intervals of 95%, between the average scores for all components of the GRBAS scale lie, in general, between 0.838 and 0.966. The first three parameters of the scale (G, R, and B) have the higher interrater reliability. Differences were statistically significant (P < 0.05) for experts 1, 6, 9, and 10, which means a poor intrarater reliability for 40% of the judges. Conclusions. All the experts had similar evaluation criteria for the assessment of the five parameters of the GRBAS scale (the values of the confidence intervals at 95% of the experts average ratings of the GRB were above 0.8). However, its quantification is not statistically similar. Asthenia and Strain have lower reliability. Most experts do not reveal statistically significant differences between the values assigned to the GRB parameters (P > 0.05).

2014

The harmonic and noise information of the glottal pulses in speech

Authors
Sousa, R; Ferreira, A; Alku, P;

Publication
BIOMEDICAL SIGNAL PROCESSING AND CONTROL

Abstract
This paper presents an algorithm, in the context of speech analysis and pathologic/dysphonic voices evaluation, which splits the signal of the glottal excitation into harmonic and noise components. The algorithm uses a harmonic and noise splitter and a glottal inverse filtering. The combination of these two functionalities leads to an improved estimation of the glottal excitation and its components. The results demonstrate this improvement of estimates of the glottal excitation in comparison to a known inverse filtering method (IAIF). These results comprise performance tests with synthetic voices and application to natural voices that show the waveforms of harmonic and noise components of the glottal excitation. This enhances the glottal information retrieval such as waveform patterns with physiological meaning.

2014

ON THE POSSIBILITY OF SPEAKER DISCRIMINATION USING A GLOTTAL PULSE PHASE-RELATED FEATURE

Authors
Ferreira, A;

Publication
2014 IEEE INTERNATIONAL SYMPOSIUM ON SIGNAL PROCESSING AND INFORMATION TECHNOLOGY (ISSPIT)

Abstract
Normalized Relative Delay (NRD) is a phase-related feature that can be extracted from the harmonic structure of a periodic sound, using accurate frequency and phase estimation. We present research results showing that NRD coefficients reflect the phase structure of glottal pulses and possess a speaker discrimination capability. We use both synthetic and natural voiced vowels uttered by children, adult males and females, to illustrate both the shift-invariance property of NRDs, as well as their speaker discrimination potential, using a Fisher related criterion of data scattering.

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