Abstract
Context-aware mobile applications can benefit from context inference adaptation based on run-time operating conditions, such as battery life or sensor availability. Developing applications with such adaptable behavior, however, is notoriously cumbersome, as developers need to deal with low-level system interfacing and programming issues. In this paper we describe a domain-specific language (DSL) and a middleware infrastructure to support the specification, deployment and maintenance of run-time adaptable context inference processes. We illustrate the benefits of our approach via a case study, highlighting the new abstractions that facilitate the specification of adaptable behavior using different algorithms and the corresponding varying parameter settings, with a specific goal of minimizing the energy while maintaing acceptable end-application performance and accuracy. © 2011 IEEE.

Abstract
The common approach to include non-functional requirements in tool chains for hardware/software embedded systems requires developers to manually change the software code and/or the hardware, in an error-prone and tedious process. In the REFLECT research project we explore a novel approach where safety requirements are described using an aspect-and strategy-oriented programming language, named LARA, currently under development. The approach considers that the weavers in the tool chain use those safety requirements specified as aspects and strategies to produce final implementations according to specific design patterns. This paper presents our approach including LARA-based examples using an avionics application targeting the FPGA-based embedded systems consisting of a general purpose processor (GPP) coupled to custom computing units.

Abstract
Many video and image/signal processing applications can be structured as sequences of data-dependent tasks using a consumer/producer communication paradigm and are therefore amenable to pipelined execution. This paper presents an execution technique to speed-up the overall execution of successive, data-dependent tasks on a reconfigurahle architecture. The technique pipelines sequences of data-dependent tasks by overlapping their execution subject to data-dependences. It decouples the concurrent data-path and control units and uses a custom, application data-driven, fine-grained synchronization and buffering scheme. In addition, the execution scheme allows for out of-order, but data-dependent producer-consumer pairs not allowed by previous data-driven pipelining approaches. The approach has been exploited in the context of a high-level compiler targeting FPGAs. The preliminary experimental results reveal noticeable performance improvements and buffer size reductions for a number of benchmarks over traditional approaches.

Abstract
LARA is a programming language being developed to complement application code in a host programming language with instrumentation code, for monitoring, logging, and debugging, user's knowledge about specific characteristics of the application, non-functional requirements, and compiler, mapping and synthesis strategies to guide/control design-flows, especially the ones used to map computations to FPGA-based systems. This paper shows how the aspect-oriented approach provided by LARA allows developers to specify complementary program information that can be used by LARA aware design-flows to promote customized FPGA-based software/hardware implementations. Program and compiler/mapping specialization take advantage of specific properties of applications to optimize and customize specific application modules and software/hardware implementations, e. g., according to usage contexts. We illustrate the concept using a hotspot function from a real-life, industrial, application. The results show the importance of program specialization in deriving hardware/software implementations with higher-performance.

Abstract

Abstract
This demonstration presents a novel design-flow and aspect-oriented language called LARA [1], which is currently used to guide the mapping of high-level C application codes to heterogeneous high-performance embedded systems. In particular, LARA is capable of capturing complex strategies and schemes involving: hardware/software partitioning, code specialization, source code transformations and code instrumentation. A key element of LARA, and a distinguishing feature from existing approaches, is its ability to support the specification of non-functional requirements and user knowledge in a non-invasive way in the exploration of suitable implementations. The design-flow incorporates several tools, such as a LARA frontend, a hardware/software partitioning tool, an aspect weaver, cost estimator, and a source-level transformation engine. All these components can be coordinated as part of an elaborate application mapping strategy using LARA. In this demonstration, we illustrate how non-functional cross-cutting concerns such as runtime monitorization and performance are codified and described in LARA and how the weaving process affects selected applications. Furthermore, we also explain how third-party tools, such as gprof, can be incorporated into the design-flow and aspect description, for instance, to affect the hardware/software partitioning process. We demonstrate how LARA can be used to extract run-time information, such as range values of variables, and can control code transformations and compiler optimizations addressing customized implementations of the corresponding computations on FPGAs. © 2012 ACM.