2013
Authors
Barros, A; Pinho, LM;
Publication
ACM SIGAda Ada Letters
Abstract
2016
Authors
Barros, A; Yomsi, PM; Pinho, LM;
Publication
2016 11TH IEEE INTERNATIONAL SYMPOSIUM ON INDUSTRIAL EMBEDDED SYSTEMS (SIES)
Abstract
Software transactional memory (STM) is a synchronisation paradigm which improves the parallelism and composability of modern applications executing on a multi-core architecture. However, to abort and retry a transaction multiple times may have a negative impact on the temporal characteristics of a real-time task set. This paper addresses this issue: It provides a framework in which an upper-bound on the worst-case response time of each task is derived, assuming that tasks are scheduled by following either the Non-Preemptive During Attempt (NPDA), Non-Preemptive Until Commit (NPUC) or Stack Resource Policy for Transactional Memory (SRPTM) policy.
2015
Authors
Barros, A; Pinho, LM; Yomsi, PM;
Publication
JOURNAL OF SYSTEMS ARCHITECTURE
Abstract
Recent embedded processor architectures containing multiple heterogeneous cores and non-coherent caches renewed attention to the use of Software Transactional Memory (STM) as a building block for developing parallel applications. STM promises to ease concurrent and parallel software development, but relies on the possibility of abort conflicting transactions to maintain data consistency, which in turns affects the execution time of tasks carrying transactions. Because of this fact the timing behaviour of the task set may not be predictable, thus it is crucial to limit the execution time overheads resulting from aborts. In this paper we formalise a FIFO-based algorithm to order the sequence of commits of concurrent transactions. Then, we propose and evaluate two non-preemptive and one SRP-based fully-preemptive scheduling strategies, in order to avoid transaction starvation.
2015
Authors
Ali, HI; Akesson, B; Pinho, LM;
Publication
2015 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing
Abstract
2015
Authors
Pinho, LM; Moore, B; Michell, S; Taft, ST;
Publication
2015 IEEE 36TH REAL-TIME SYSTEMS SYMPOSIUM (RTSS 2015)
Abstract
2015
Authors
Lindgren, P; Lindner, M; Pereira, D; Pinho, LM;
Publication
2015 IEEE TRUSTCOM/BIGDATASE/ISPA, VOL 3
Abstract
The IEC 61499 standard proposes an event driven execution model for distributed control applications for which an informal execution semantics is provided. Consequently, run-time implementations are not rigorously described and therefore their behavior relies on the interpretation made by the tool provider. In this paper, as a step towards a formal semantics, we focus on the Execution Control Chart semantics, which is fundamental to the dynamic behavior of Basic Function Block elements. In particular we develop a well-formedness criterion that ensures a finite number of Execution Control Chart transitions for each triggering event. We also describe the first step towards the mechanization of the well-formedness checking algorithm in the Coq proof-assistant so that, ultimately, we are able to show, once and for all, that this algorithm is effectively correct with respect to our proposed execution semantics. The algorithm is extractable from the mechanization in a correct-by-construction way, and can be directly incorporated in certified toolchain for analysis, compilation and execution of IEC 61499 models. As a proof of concept a prototype tool RTFM-4FUN has been developed. It performs well-formedness checks on Basic Function Blocks using the extracted algorithm's code.
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