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Supervised
thesis

Supervised thesis by Nuno Miguel Paulino

Runtime Management of Heterogeneous Compute Resources in Embedded Systems

Author Luís Miguel Mendes Pimentel Alves de Sousa

Degree MSc

Year 2021

Institution UP-FEUP

An Exploration of FPGAs as Accelerators for Graph Analysis via High-Level Synthesis

Author Pedro Filipe Vilhena de Campos Oliveira e Silva

Degree MSc

Year 2021

Institution UP-FEUP

Generating Hardware Modules via Binary Translation of RISC-V Binaries

Author João Miguel Curado Conceição

Degree MSc

Year 2020

Institution UP-FEUP

Dynamically Reconfigurable Multi-Classifier Architecture on FPGA

Author Joana Lima Macedo

Degree MSc

Year 2020

Institution UP-FEUP

Dynamically Reconfigurable Multi-Classifier Architecture on FPGA

Author Joana Macedo

Degree MSc

Year 2020

Institution UP-FEUP

Vehicle Tracking in Warehouses via Bluetooth Beacon Angle-of-Arrival

Author Telmo Francisco da Costa Soares

Degree MSc

Year 2020

Institution UP-FEUP

An Exploration of FPGAs as Accelerators for Graph Analysis via High-Level Synthesis

Author Pedro Filipe Vilhena de Campos Oliveira e Silva

Degree MSc

Year 2020

Institution UP-FEUP

Runtime Management of Heterogeneous Compute Resources in Embedded Systems

Author Luís Miguel Mendes Pimentel Alves de Sousa

Degree MSc

Year 2020

Institution UP-FEUP

Generating Hardware Modules via Binary Translation of RISC-V Binaries

Author João Miguel Curado Conceição

Degree MSc

Year 2020

Institution UP-FEUP

Run-Time Selection of Customized Accelerators

Author José Miguel Carvalho Martins de Campos

Degree MSc

Year 2020

Institution UP-FEUP

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