Theses - INESC TEC

Supervised
thesis

Supervised thesis by João Canas Ferreira

FPGA implementation of a baseband processor for FBMC transmission

Author Miguel Nuno Marques Vaz de Carvalho

Degree MSc

Year 2017

Institution UP-FEUP

"Profiling" por hardware em tempo real para sistemas embebidos

Author Rui Miguel Almeida Alves

Degree MSc

Year 2017

Institution UP-FEUP

Evolução da componente algorítmica de cálculo de rotas do Move-Me

Author André Pedro Deus Pinheiro

Degree MSc

Year 2017

Institution UP-FEUP

Implementação em FPGA de um conversor HDMI para transmissão em série de alta velocidade

Author Ana Marisa Oliveira Barbosa

Degree MSc

Year 2017

Institution UP-FEUP

FPGA implementation of OFDM signals for application to radio-over-fiber systems

Author Davide Alfredo Andrade Cerqueira

Degree MSc

Year 2016

Institution UP-FEUP

Operadores especializados para cálculo em vírgula flutuante com FPGAs

Author Jorge Filipe Morais Neves

Degree MSc

Year 2016

Institution UP-FEUP

FPGA implementation of a LSTM Neural Network

Author José Pedro Castro Fonseca

Degree MSc

Year 2016

Institution UP-FEUP

Study on the FPGA implementation of the conversion of uncompressed High-Definition video signals for distribution over IP networks

Author José Ricardo Silva de Sá

Degree MSc

Year 2016

Institution UP-FEUP

Interactive Tool for Specifying Dedicated Hardware Accelerators

Author João Paulo Paiva Rebocho

Degree MSc

Year 2016

Institution UP-FEUP

Reconfigurable FPGA-Based NC-OFDM Processor for Multimode Spectrum Aggregation

Author Mário Lopes Ferreira

Degree MSc

Year 2016

Institution UP-FEUP

Generation of Custom Run-Time Reconfigurable Hardware for Transparent Binary Acceleration

Author Nuno Miguel Cardanha Paulino

Degree MSc

Year 2016

Institution UP-FEUP

power-aware radiation-tolerant asic design for tracking detectors in lhc experiments

Author Filipe José Pereira Alves de Sousa

Degree MSc

Year 2016

Institution UP-FEUP