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Publications

Publications by HumanISE

1999

An image generation sub-system for a realistic driving simulator

Authors
Leitao, JM; Sousa, AA; Ferreira, FN;

Publication
INTERNATIONAL CONFERENCE ON IMAGING SCIENCE, SYSTEMS, AND TECHNOLOGY, PROCEEDINGS

Abstract
This paper presents a description of the image generation sub-system developed to allow the presentation of realistic visual feedback in interactive visual simulation with large scene databases. The developed image generator applies all the standard state-of-art image generation algorithms aimed to real-time interactive simulation. Some of these important algorithms are also explained in this document. I addition, some innovative optimization techniques like the hierarchical back face rejection of objects, the visibility preprocessing and the automatic optimization of levels-of-detail are being developed and detailed in this paper. These techniques will allow a better use of any image generation system and improve significantly the visualization of huge scene databases even in high-end graphics architectures.

1999

Representation and manipulation of moving points: An extended data model for location estimation

Authors
Moreira, J; Ribeiro, C; Saglio, JM;

Publication
Cartography and Geographic Information Science

Abstract
In this paper we introduce a classification for spatio-temporal systems based on the properties of the represented objects. Building on this classification, we assert that complex objects can be derived from simpler ones, following an evolutionary approach which starts with the study of simple objects and ends by enriching them with new features. This paper focuses on the definition of a data model for the representation of moving points. The model is based on the decomposition of the trajectory of moving points into sections. The movement within each section of a trajectory is described by a variability function. Because for most systems is not possible to store the exact knowledge about the movement of an object, the answers to queries may be imprecise. We propose two additional approaches to deal with impression-the superset and the subset semantics-based on a maximum value for the variability function, and a smooth technique to integrate them in the model. Finally, we analyze certain functional aspects of the implementation of the data model in a Relational Database Management System (RDBMS) and outline directions for future research.

1999

Data-driven Active Rules for the Maintenance of Derived Data and Integrity Constraints in User Interfaces to Databases

Authors
Faria, JP; Vidal, RM;

Publication
XIV Simpósio Brasileiro de Banco de Dados, 11-13 Outubro 1999, Florianópolis, Santa Catarina, Brasil, Anais/Proceedings

Abstract

1999

Pseudo-Reference

Authors
Aguiar, A;

Publication
Proceedings of the 4th European Conference on Pattern Languages of Programms (EuroPLoP '1999), Irsee, Germany, July 7-11, 1999

Abstract

1999

Architectures and compilers to support reconfigurable computing

Authors
Cardoso, JMP; Vestístias, MP;

Publication
XRDS

Abstract

1999

Macro-Based Hardware Compilation of Java(tm) Bytecodes into a Dynamic Reconfigurable Computing System

Authors
Cardoso, JMP; Neto, HC;

Publication
7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 21-23 April 1999, Napa, CA, USA

Abstract
This paper presents a new approach to synthesize to reconfigurable hardware (HW) user-specified regions of a program, under the assumption of "virtual HW" support. The automation of this approach is supported by a compiler front-end and by an HW compiler under development. The front-end starts from the Java bytecodes and, therefore, supports any language that can be compiled to the JVM (Java Virtual Machine) model. It extracts from the bytecodes all the dependencies inside and between basic blocks. This information is stored in representation graphs more suitable to efficiently exploit the existent parallelism in the program than those typically used in high-level synthesis. From the intermediate representations the HW compiler exploits the temporal partitions at the behavior level, resolves memory access conflicts, and generates the VHDL descriptions at register-transfer level that will be mapped into the reconfigurable HW devices.

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