Abstract
This paper analyzes the dynamics and the implementation of fractional-order algorithms in the position/force control of two robots holding an object. The experiments reveal that fractional algorithms lead to performances superior to classical integer-order controllers.

Abstract
This paper presents the implementation of fractional-order algorithms both for hybrid and cascade position/force control of robotic manipulators. The system performance and robustness is analyzed in the time and frequency domains. The effects joint backlash and flexibility are also investigated.

Abstract
This paper analyzes the performance of two cooperative robot manipulators. It is studied the implementation of fractional-order algorithms in the position/force control of two robots holding an object. The experiments reveal that fractional algorithms lead to performances superior to classical integer-order controllers.

Abstract

Abstract
This paper proposes a new algorithm which promotes well distributed non-dominated fronts in the parameters space when a single-objective function is optimized. This algorithm is based on e-dominance concept and maxmin sorting scheme. Besides that, the paper also presents the results of the algorithm when it is used in the automated synthesis of optimum performance CMOS radio-frequency and microwave binary-weighted differential switched capacitor arrays (RFDSCAs). The genetic synthesis tool optimizes a fitness function which is based on the performance parameter of the RFDSCAs. To validate the proposed design methodology, a CMOS RFDSCA is synthesized, using a 0.25 µm BiCMOS technology.

Abstract
This work presents a procedure to automate the design of Si-integrated radio frequency (RF) discrete tuning varactors (RFDTVs). The synthesis method, which is based on evolutionary algorithms, searches for optimum performance RF switched capacitor array circuits that fulfill the design restrictions. The design algorithm uses the c-dominance concept and the maximin sorting scheme to provide a set of different Solutions (circuits) well distributed along an optimal front in the parameter space (circuit size and component values). Since all the solutions present the same performance, the designer call Select the circuit that is best suited to be implemented in a particular integration technology. To assess the performance of the synthesis procedure, several RFDTV circuits, provided by the algorithm, were designed and simulated rising a 0.18 mu m CMOS technology and the Cadence Virtuoso Design Platform. The comparisons between the algorithm and circuit; simulation results show that they are very close, pointing out that; the proposed design procedure is a powerful design tool.