Abstract

Abstract
The IEC 61499 standard proposes an event driven execution model for distributed control applications for which an informal execution semantics is provided. Consequently, run-time implementations are not rigorously described and therefore their behavior relies on the interpretation made by the tool provider. In this paper, as a step towards a formal semantics, we focus on the Execution Control Chart semantics, which is fundamental to the dynamic behavior of Basic Function Block elements. In particular we develop a well-formedness criterion that ensures a finite number of Execution Control Chart transitions for each triggering event. We also describe the first step towards the mechanization of the well-formedness checking algorithm in the Coq proof-assistant so that, ultimately, we are able to show, once and for all, that this algorithm is effectively correct with respect to our proposed execution semantics. The algorithm is extractable from the mechanization in a correct-by-construction way, and can be directly incorporated in certified toolchain for analysis, compilation and execution of IEC 61499 models. As a proof of concept a prototype tool RTFM-4FUN has been developed. It performs well-formedness checks on Basic Function Blocks using the extracted algorithm's code.

Abstract
This paper explores the behavior of parallel forkjoin tasks on multicore platforms by resorting to a semi-partitioned scheduling model. This model offers a promising framework to embedded systems which are subject to stringent timing constraints as it provides these systems with very interesting properties. The proposed approach consists of two stages-an offline stage and an online stage. During the offline stage, a multi-frame task model is adopted to perform the forkjoin task-to-core mapping so as to improve the schedulability and the performance of the system, and during the online stage, work-stealing is exploited among cores to improve the system responsiveness as well as to balance the execution workload. The objective of this work is twofold: (1) to provide an alternative technique that takes advantage of the semi-partitioned scheduling properties by offering the possibility to accommodate forkjoin tasks that cannot be scheduled in any pure partitioned environment, and (2) to reduce the migration overhead which has shown to be a traditional major source of non-determinism in global approaches. The simulation results show an improvement of the proposed approach over the state-of-the-art of up to 15% of the average response-time per task set.

Abstract
Many embedded multi-core systems incorporate both dataflow applications with timing constraints and traditional real-time applications. Applying real-time scheduling techniques on such systems provides real-time guarantees that all running applications will execute safely without violating their deadlines. However, to apply traditional real-time scheduling techniques on such mixed systems, a unified model to represent both types of applications running on the system is required. Several earlier works have addressed this problem and solutions have been proposed that address acyclic graphs, implicit-deadline models or are able to extract timing parameters considering specific scheduling algorithms. In this paper, we present an algorithm for extracting real-time parameters (offsets, deadlines and periods) that are independent of the schedulability analysis, other applications running in the system, and the specific platform. The proposed algorithm: 1) enables applying traditional real-time schedulers and analysis techniques on cyclic or acyclic Homogeneous Synchronous Dataflow (HSDF) applications with periodic sources, 2) captures overlapping iterations, which is a main characteristic of the execution of dataflow applications, 3) provides a method to assign offsets and individual deadlines for HSDF actors, and 4) is compatible with widely used deadline assignment techniques, such as NORM and PURE. The paper proves the correctness of the proposed algorithm through formal proofs and examples.

Abstract
As of today, AUTOSAR is the de facto standard in the automotive industry, providing a common software architecture and development process for automotive applications. While this standard is originally written for singlecore operated Electronic Control Units (ECU), new guidelines and recommendations have been added recently to provide support for multicore architectures. This update came as a response to the steady increase of the number and complexity of the software functions embedded in modern vehicles, which call for the computing power of multicore execution environments. In this paper, we enumerate and analyze the design options and the challenges of porting AUTOSAR-based automotive applications onto multicore platforms. In particular, we investigate those options when considering the emerging many-core architectures that provide a more scalable environment than the traditional multicore systems. Such platforms are suitable to enable massive parallel execution, and their design is more suitable for partitioning and isolating the software components.

Abstract
Owing to the current trends for higher performance and the ever growing availability of multiprocessors in the embedded computing (EC) domain, there is nowadays a strong push towards the parallelization of modern embedded applications. Several real-time task models have recently been proposed to capture different forms of parallelism. However, they do not deal explicitly with control flow information as they assume that all the threads of a parallel task must execute every time the task is activated. In contrast, in this paper, we present a multi-DAG model where each task is characterized by a set of execution flows, each of which represents a different execution path throughout the task code and is modeled as a DAG of sub-tasks. We propose a two-step solution that computes a single synchronous DAG of servers for a task modeled by a multi-DAG and show that these servers are able to supply every execution flow of that task with the required cpu-budget so that the task can execute entirely, irrespective of the execution flow taken at run-time, while satisfying its precedence constraints. As a result, each task can be modeled by its single DAG of servers, which facilitates in leveraging the existing single-DAG schedulability analyses techniques for analyzing the schedulability of parallel tasks with multiple execution flows.