Abstract
This chapter presents LARA, an aspect-oriented domain-specific language developed in the context of the REFLECT project. We describe its main features, including syntax and semantics (as defined by the LARA 2.0 technical specification [1]), and provide detailed examples of its use. In particular, we cover the mapping of computations written in high-level programming languages such as C to reconfigurable architectures considering non-functional requirements and user concerns. © Springer Science+Business Media New York 2013. All rights are reserved.

Abstract

Abstract
A summary of contributions made by significant papers from the first 25 years of the Field-Programmable Logic and Applications conference (FPL) is presented. The 27 papers chosen represent those which have most strongly influenced theory and practice in the field.

Abstract
Using dynamic partial reconfiguration (DPR), several circuits can be time-multiplexed on the same FPGA region, saving considerable area compared to an implementation without DPR. However, the long reconfiguration time to switch between circuits remains a significant problem. In this work we show that it is possible to significantly reduce this overhead when the number of circuits is limited. We lower the DPR overhead by reducing the number of configuration bits that needs to be reconfigured. This is achieved by keeping a (predetermined) part of the configuration frames of the DPR region constant/static for all circuits and, consequentially, sharing this part of the configuration between all the circuits. We show that this can be done maintaining the possibility to implement completely unrelated circuits in the DPR region. An extension of the Pathfinder algorithm, called StaticRoute, is presented. It is able to route the nets of the different circuits simultaneously in such a way that the routing of the different circuits is the same in the static part and may only differ in the dynamic part. Our approach is evaluated on the architecture of a commercially available SRAM-based FPGA. We explore how the static part in the configuration memory is best chosen and investigate the associated impact on maximum operating clock frequency as the number of circuits increases. Our experiments show that it is possible to make 50 % of the routing configuration static and therefore reduce the routing reconfiguration time by 50 %, without a significant impact on maximum clock frequency of the circuits. This corresponds to a reduction of total reconfiguration time of 34 %.

Abstract

Abstract
Usually, Aspect-Oriented Programming (AOP) languages are an extension of a specific target language (e.g., AspectJ for Java and AspectC++ for C++). This coupling can impose drawbacks such as arbitrary limitations to the aspect language. LARA is a DSL for source-to-source transformations inspired by AOP concepts, and has been designed to be independent of the target language. In this paper we propose techniques to overcome some of the challenges presented by a language-independent approach to source code transformations, and present and discuss possible solutions and their impact. Additionally, we present some of the benefits and opportunities of this approach. We present an evaluation of our approach, show that we can significantly reduce the effort to develop weavers for new target languages and that the proposed techniques contribute to more concise LARA aspects and safer semantics. Copyright 2017 ACM.