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Publicações

Publicações por Luis Miguel Pinho

2014

Parallelism in Ada: Status and Prospects

Autores
Pinho, LM; Moore, B; Michell, S;

Publicação
RELIABLE SOFTWARE TECHNOLOGIES - ADA-EUROPE 2014

Abstract
Recently, a semantic and runtime model for parallel programming was proposed for addition to Ada. The proposal uses program annotations (expressed as Ada 2012 aspects) to inform the compiler of opportunities for parallel computation, and also offers the ability to specify details of parallel execution. The proposal includes support for specialized behaviors via dedicated libraries and a runtime environment that builds on pools of worker tasks. This paper extends that work by adding notations for data types and parallel blocks, simplifying some of the parallel notations and eliminating obstructions to the implementation of efficient parallel algorithms.

2014

Editorial

Autores
Pinho, LM;

Publicação
Ada User Journal

Abstract

2014

P-SOCRATES: a Parallel Software Framework for Time-Critical Many-Core Systems

Autores
Miguel Pinho, LM; Quinones, E; Bertogna, M; Marongiu, A; Pereira Carlos, JP; Scordino, C; Ramponi, M;

Publicação
2014 17TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD)

Abstract
The advent of next-generation many-core embedded platforms has the chance of intercepting a converging need for predictable high-performance coming from both the High-Performance Computing (HPC) and Embedded Computing (EC) domains. On one side, new kinds of HPC applications are being required by markets needing huge amounts of information to be processed within a bounded amount of time. On the other side, EC systems are increasingly concerned with providing higher performance in real-time, challenging the performance capabilities of current architectures. This converging demand, however, raises the problem about how to guarantee timing requirements in presence of parallel execution. This paper presents the approach of project P-SOCRATES for the design of an integrated framework for the execution of workload-intensive applications with real-time requirements on top of nextgeneration commercial-off-the-shelf (COTS) platforms based on many-core accelerated architectures. The time-criticality and parallelisation challenges are addressed by merging techniques coming from both HPC and EC domains, identifying the main sources of indeterminism and proposing efficient mapping and scheduling algorithms, along with the associated timing and schedulability analysis, to guarantee the real-time and performance requirements of the applications.

2014

Editorial

Autores
Pinho, LM;

Publicação
Ada User Journal

Abstract

2015

An execution model for fine-grained parallelism in Ada

Autores
Pinho, LM; Moore, B; Michell, S; Taft, ST;

Publicação
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Abstract
This paper extends the authors earlier proposal for providing Ada with support for fine-grained parallelism with an execution model based on the concept of abstract executors, detailing the progress guarantees that these executors must provide and how these can be assured even in the presence of potentially blocking operations. The paper also describes how this execution model can be applied to real-time systems. © Springer International Publishing Switzerland 2015.

2015

A novel run-time monitoring architecture for safe and efficient inline monitoring

Autores
Nelissen, G; Pereira, D; Pinho, LM;

Publicação
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Abstract
Verification and testing are two of the most costly and time consuming steps during the development of safety critical systems. The advent of complex and sometimes partially unpredictable computing architectures such as multicore commercial-of-the-shelf platforms, together with the composable development approach adopted in multiple industrial domains such as avionics and automotive, rendered the exhaustive testing of all situations that could potentially be encountered by the system once deployed on the field nearly impossible. Run-time verification (RV) is a promising solution to help accelerate the development of safety critical applications whilst maintaining the high degree of reliability required by such systems. RV adds monitors in the application, which check at run-time if the system is behaving according to predefined specifications. In case of deviations from the specifications during the runtime, safeguarding measures can be triggered in order to keep the system and its environment in a safe state, as well as potentially attempting to recover from the fault that caused the misbehaviour. Most of the state-of-the-art on RV essentially focused on the monitor generation, concentrating on the expressiveness of the specification language and its translation in correct-by-construction monitors. Few of them addressed the problem of designing an efficient and safe run-time monitoring (RM) architecture. Yet, RM is a key component for RV. The RM layer gathers information from the monitored application and transmits it to the monitors. Therefore, without an efficient and safe RM architecture, the whole RV system becomes useless, as its inputs and hence by extension its outputs cannot be trusted. In this paper, we discuss the design of a novel RM architecture suited to safety critical applications. © Springer International Publishing Switzerland 2015.

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