Abstract
Cognitive health status is a determining factor for quality of life. Since early identification of mild cognitive impairment is critical to better manage further decline, and to guide therapeutic and rehabilitation interventions, there is the need for efficient clinical instruments able to monitor the individuals, particularly older adults, in their residential environments. This paper presents a scoping review to identify of innovative digital solutions to detect cognitive impairments and that might be used as a screening tool for age related cognitive impairment of community-dwelling older adults. Nineteen articles were included in this scoping review. As a main conclusion, most of the included articles report digital solutions to support the application of existing paper-based clinical instruments to assess specific or multiple cognitive functions. However, six studies explore new approaches to assess cognitive functions including virtual reality and serious games.

Abstract
Data visualization is key in the Big Data context, enabling different cognitive perspectives over large datasets. These visual perspectives can prompt relevant advantages with regard to healthcare records, because they may contribute to a faster, more understandable, and adequate way to capture patients' health history and overall condition, thus improving healthcare quality. Timelines are well-known visual artifacts that help healthcare professionals to visualize patients' electronic health records (EHR) over a time period. As data stored in EHR tend to quickly grow with each interaction between patient and healthcare system both number and size, traditional linear timelines are can increasingly become more difficult to manage visually, as they often span over different screens. Considering that a holistic analysis is desirable to provide proper and quality health services, data visualization should enable a seamless understanding of patients' health history and overall condition. When dealing with critical episodes - such as an emergency - where time is an important factor, this is even more decisive. Furthermore, traditional timelines do not support multidimensional data representation. This paper presents a new visual model of time-dependent EHR based on radial models. It is capable of simultaneously displaying several data categories that characterize patients' medical history, enabling medical professionals to be aware of different data categories over time in a single display, without the need to scroll between screens.

Abstract
Falls, especially in the elderly, are one of the main factors of hospitalization. Time-consuming intervention can be fatal or cause irreversible damages to the victims. On the other hand, there is currently a significant amount of smart clothing equipped with various sensors, particularly gyroscopes and accelerometers, which can be used to detect accidents. The creation of a tool that automatically detects eventual falls allows helping the victims as soon as possible. This works focuses in the automatic fall detection from sensors signals using long short-term memory networks. To train and test this approach, the Sisfall dataset is used, which considers the simulation of 23 adults and 15 older people. These simulations are based on everyday activities and the falls that may result from their execution. The results indicate that the procedure provides an accuracy score of 97.1% on the test set.

Abstract
This paper reports a scoping review of the literature to identify the inquiry instruments being used to evaluate the usability of AAL solutions, which resulted in the inclusion of 35 studies. The results show that a significant number of the included studies reported the use of non-valid inquiry instruments, such as ad-hoc questionnaires. Among the studies using valid and reliable inquiry instruments, System Usability Scale (SUS) emerged as the most used one. In general, valid and reliable inquiry instruments are being used together with additional data gathering methods, to perform comprehensive usability evaluations. Moreover, in terms of the quality of the design of the included studies, it should be pointed the adequacy of the participants' characteristics and the tasks they performed. In turn, these studies did not present evidence of the preparation and independence of the evaluators.

Abstract
We propose a mechanism to raise the abstraction level of source-code analysis and robustly support multiple languages. Built on top of the LARA framework, it allows sharing language specifications between LARA source-to-source compilers, and enables the mapping of a virtual AST over the nodes of ASTs provided by different, unrelated parsers. We use this approach to create a language specification for Object-Oriented (OO) languages and add support for three different LARA compilers. We evaluate it by implementing a library of 18 software metrics using this language specification and apply the metrics to source code in four programming languages (C, C++, Java, and JavaScript). We compare the results with other tools to evaluate the approach.

Abstract
We discuss the concept of FPGA-unfriendliness, the property of certain algorithms, programs, or domains which may limit their applicability to FPGAs. Specifically, we look at graph analysis, which has recently seen increased interest in combination with High-Level Synthesis, but has yet to find great success compared to established acceleration mechanisms. To this end, we make use of Xilinx's Vitis Graph Library to implement Single-Source Shortest Paths (SSSP) and PageRank (PR), and present a custom kernel written from the ground up for Distinctiveness Centrality (DC, a novel graph centrality measure). We use public datasets to test these implementations, and analyse power consumption and execution time. Our comparisons against published data for GPU and CPU execution show FPGA slowdowns in execution time between around 18.5x and 328x for SSSP, and around 1.8x and 195x for PR, respectively. In some instances, we obtained FPGA speedups versus CPU of up to 2.5x for PR. Regarding DC, results show speedups from 0.1x to 3.5x, and energy efficiency increases from 0.8x to 6x. Lastly, we provide some insights regarding the applicability of FPGAs in FPGA-unfriendly domains, and comment on the future as FPGA and HLS technology advances.