Abstract

Abstract
This paper reviews special needs posed by today's technological advances in boards and MCMs, and addresses the requirements they place on Design for Testability techniques for assemblies of complex chips, both digital and mixed-signal. The IEEE P1149.4 mixed-signal test infrastructure is briefly described and its use as a means to support and implement different DfT techniques is described. Actual results are shown of its use on the implementation of a mixed current/voltage testing technique.

Abstract
Our main interest is the development of a computational efficient VLSI implementation of a highly complex system proposed by Freeman to explain chaotic dynamics in the olfactory cortex using discrete time techniques. One of the issues involved with this implementation approach is the offset. This paper presents a simulation of a novel circuit for offset cancellation in Switch Current circuits. According to simulation results, this new technique is able to cancel the offset and has a low sensitivity to changes in feedback parameters associated with the delay (z-1) operation.

Abstract
This paper presents results concerning a full digital implementation of the KII and KIII model proposed by Freeman to explain the chaotic behavior of the mammalian's Olfactory Cortex. The environment used for the task is a commercial neural network package. The immediate goal is to offer a computational efficient alternative to Runge-Kutta methods of solving the system's differential equations. To accomplish the goal the differential equations impulse response were sampled and decomposed over the gamma basis. Both models, KII and KIII, are presently working as associative memories, where stored patterns can be recalled from an input pattern.

Abstract

Abstract
This paper presents experiments carried out with a prototype test chip provided by the IEEE P1149.4 Mixed-Signal Testing Working Group, which explore the architecture of the proposed analogue boundary module to implement simultaneous observation of power supply current and output voltage, towards mixed current/voltage testing of analogue and mixed-signal circuits.