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Publicações

Publicações por CTM

2019

Scalable High-Gaussicity Split-Block Diagonal Horn Antenna for Integration with Sub-THz Devices

Autores
Santos, HM; Lima, ED; Pinho, P; Pessoa, LM; Moro Melgar, D; Salgado, HM;

Publicação
2019 49TH EUROPEAN MICROWAVE CONFERENCE (EUMC)

Abstract
In this paper we propose a high-gaussicity spline-profiled horn antenna, which is scalable in length and aperture to achieve higher gains whilst retaining a high Gaussian efficiency. A novel approach is used where a PSO is used for optimizing the spline, using the gaussicities at the operating frequencies as the objective function, which further improves side-lobe level and cross-polarization when compared to the state-of-the-art. With the proposed method, which was validated through FEM simulations in HFSS, reflection coefficients below -15 dB, gains greater than 25 dBi and gaussicities above 91% were obtained in the entire WR-3 band.

2019

Dual-Polarized Patch Antenna-in-Package with High Isolation for Ka-Band 5G Communications

Autores
Santos, HM; Pinho, P; Salgado, HM;

Publicação
2019 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference, IMOC 2019

Abstract
In this paper we describe the design of a dual polarized packaged patch antenna for 5G communications with improved isolation and bandwidth for Ka-band. The results were validated using FEM and Momentum co-simulations in ADS. The novelty of the approach is the use of parasitic elements in the same layer to circumvent bandwidth limitations, thereby reducing the layer count in contrast to previous designs, combined with a differential feeding technique for improved isolation and radiation pattern stability, albeit at the expense of an increased complexity in the matching process. A peak gain of 5 dBi, isolation above 40 dB and a radiation efficiency of 60% were obtained. © 2019 IEEE.

2019

Predictive multi-view content buffering applied to interactive streaming system

Autores
Costa, TS; Andrade, MT; Viana, P;

Publicação
ELECTRONICS LETTERS

Abstract
This Letter discusses the benefits of introducing Machine Learning techniques in multi-view streaming applications. Widespread use of machine learning techniques has contributed to significant gains in numerous scientific and industry fields. Nonetheless, these have not yet been specifically applied to adaptive interactive multimedia streaming systems where, typically, the encoding bit rate is adapted based on resources availability, targeting the efficient use of network resources whilst offering the best possible user quality of experience (QoE). Intrinsic user data could be coupled with such existing quality adaptation mechanisms to derive better results, driven also by the preferences of the user. Head-tracking data, captured from camera feeds available at the user side, is an example of such data to which Recurrent Attention Models could be applied to accurately predict the focus of attention of users within videos frames. Information obtained from such models could be used to assist a preemptive buffering approach of specific viewing angles, contributing to the joint goal of maximising QoE. Based on these assumptions, a research line is presented, focusing on obtaining better QoE in an already existing multi-view streaming system

2019

Adaptation Execution Cost Definition for a Multimedia Adaptation Decision Engine Using a Neural Network

Autores
Fernandes, R; Andrade, MT;

Publicação
INTERNATIONAL CONFERENCE ON NUMERICAL ANALYSIS AND APPLIED MATHEMATICS (ICNAAM-2018)

Abstract
Multimedia content adaptation decision is necessary whenever a multimedia transmission system has multiple adaptations available to adjust the content representation requirements to the present available system resources. The implementation of an adaptation decision module, based on a Markov Decision Process, requires to weight the adaptations, to establish the adaptation plan to deliver the best possible Quality of Experience (QoE) to the user. We present a method, using a feedforward neural network, to determine these costs using two approaches: user and service provider perspectives.

2019

An FPGA-Oriented Baseband Modulator Architecture for 4G/5G Communication Scenarios

Autores
Ferreira, ML; Ferreira, JC;

Publicação
ELECTRONICS

Abstract
The next evolution in cellular communications will not only improve upon the performance of previous generations, but also represent an unparalleled expansion in the number of services and use cases. One of the foundations for this evolution is the design of highly flexible, versatile, and resource-/power-efficient hardware components. This paper proposes and evaluates an FPGA-oriented baseband processing architecture suitable for communication scenarios such as non-contiguous carrier aggregation, centralized Cloud Radio Access Network (C-RAN) processing, and 4G/5G waveform coexistence. Our system is upgradeable, resource-efficient, cost-effective, and provides support for three 5G waveform candidates. Exploring Dynamic Partial Reconfiguration (DPR), the proposed architecture expands the design space exploration beyond the available hardware resources on the Zynq xc7z020 through hardware virtualization. Additionally, Dynamic Frequency Scaling (DFS) allows for run-time adjustment of processing throughput and reduces power consumption up to 88%. The resource overhead for DPR and DFS is residual, and the reconfiguration latency is two orders of magnitude below the control plane latency requirements proposed for 5G communications.

2019

Dynamic Partial Reconfiguration of Customized Single-Row Accelerators

Autores
Paulino, NMC; Ferreira, JC; Cardoso, JMP;

Publicação
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Abstract
The use of specialized accelerator circuits is a feasible solution to address performance and energy issues in embedded systems. This paper extends a previous field-programmable gate array-based approach that automatically generates pipelined customized loop accelerators (CLAs) from runtime instruction traces. Despite efficient acceleration, the approach suffered from high area and resource requirements when offloading a large number of kernels from the target application. This paper addresses this by enhancing the CLA with dynamic partial reconfiguration (DPR) support. Each kernel to accelerate is implemented as a variant of a reconfigurable area of the CLA which hosts all functional units and configuration memory. Evaluation of the proposed system is performed on a Virtex-7 device. We show, for a set of 21 kernels, that when comparing two CLAs capable of accelerating the same subset of kernels, the one which benefits from DPR can be up to 4.3x smaller. Resorting to DPR allows for the implementation of CLAs which support numerous kernels without a significant decrease in operating frequency and does not affect the initiation intervals at which kernels are scheduled. Finally, the area required by a CLA instance can be further reduced by increasing the IIs of the scheduled kernels.

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