Engenharia
[Open soon]
Work description
• Familiarization with the PolarFile SoC platform, which will be used for implementation; • Selection and integration of an existing state-of-the-art CGRA for integration with the RISC-V processor on the target PolarFire board; • Implementation of the hardware needed to interpret a set of custom instructions for controlling a CGRA (Coarse Grained Reconfigurable Array) type hardware accelerator; • Collaboration in the writing of a scientific article to disseminate the results.
Academic Qualifications
• Graduation or enrollment in a master's degree in electrical engineering, computer science, or a related field;
Minimum profile required
• Experience in HDL and C++• Fluency in English (written and spoken)
Preference factors
• Experience in RISC-V • Experience in FPGA or heterogeneous systems • Fluent in Portuguese and English (written and spoken)
Application Period
Since 13 Mar 2025 to 27 Mar 2025
[Open soon]
Centre
Telecommunications and Multimedia